1. Field of the Invention
This invention relates to magnetic bubble domain systems, in general, and to an improved major/minor loop arrangement, in particular.
2. Prior Art
Magnetic bubble domain devices are being utilized to perform many functions in the handling of data. Many devices and systems are being used and explored. It has been determined that one of the primary utilizations for magnetic bubble domain systems is in large memory systems. One of the foremost memory organizations is the major/minor loop type of bubble domain memory chip organization. One of the advantages of this organization is that it has a built-in redundancy capability in that a plurality of minor loops are provided to interact with a single major loop. This redundancy is important in that, if there are a few defective minor (storage) loops in the chip, the defects can be ignored or overcome by avoiding these defective loops. Thus, it is not essential to produce a memory chip which is absolutely perfect. Consequently, the processing yields for this type of memory can be greatly improved.
In the past, to effect this type of system, the bubble domain memory chips have been tested and sorted to determine which chips and which loops on each chip are satisfactory or defective. Typically, when the testing has been completed, the chips have been subjected to "on-chip" modifications wherein loop structures have been physically altered (e.g. elements etched off) to remove the loops from the operative circuit. In addition, or in the alternative, systems requiring special electronic controls to handle the input and output data can be utilized. That is, electronic control systems keep track of the information to be stored in the memory and remember when information to or from a defective loop would be provided. Basically, this electronic "off-chip" correction incorporates a large memory system and the like. In addition, for large multi-tiered memories, highly inefficient operation is achieved. This type of system is defined in "Fault-Tolerant Memory Organization: Impact on Chip Yield and System Cost", Naden et al, IEEE Trans. MAG.-10, 1974, pp 852-885. The difficulty and complexity in producing such systems are great as is well known. Therefore, it is desirable to avoid this complex arrangement. However, to date, no solution is possible other than the difficult and complex as well as energy and space consuming concept noted above.